Qwen3.6-35B-MLX Sizing and Throughput Profiling
Parent: Local Model Performance Evaluation: Ollama, MLX, and Hardware Architectures · Published reference · snapshot 2026-09-30
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Source-anchored research for Qwen3.6-35B-MLX Sizing and Throughput Profiling. Run status: COMPLETED.
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Measurements and reference values
- Qwen3.6-35B in 4-bit quantized representation requires ~21.9 GB base weight footprint, fitting comfortably in 64GB Unified Memory while exceeding the 16GB capacity of consumer discrete GPUs. (high confidence) [source]
- On Apple M5 Max (400 GB/s bandwidth), memory-bound token generation for 35B 4-bit weights achieves 15.5 to 17.2 tokens per second, closely tracking theoretical memory bus saturation (400 GB/s / 22 GB = ~18.1 tps max). (high confidence) [source]
- Expanding context length to 64k tokens adds ~9.0 GB to the KV cache in 16-bit float, requiring explicit dynamic context cache management or 8-bit quantized KV cache to maintain resident headroom. (high confidence) [source]
- Multi-Token Prediction (MTP) heads in Qwen3.6 allow speculative verification of subsequent tokens, improving generation throughput by 20-30% on high-bandwidth memory architectures. (high confidence) [source]
Children
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